Hi guys,
New to the forum and just wanted some thoughts on discrimination and arc Fault. we are currently in the process of doing some arc fault containment testing with our 11KV and 3.3KV MCCs this has lead us on a path of having our upper circuit breaker trip settings very sensitive to get around fault times. My question is, are we really just robbing peter to pay Paul in this instance? Any thoughts would be great.

It may be possible to put in a switch that changes the breaker settings to a sensitive "maintenance setting". This way you can maintain selectivity during normal operations but have low arc energy during maintenance.

In answer to your question about the effect of setting your upstream breakers to trip more sensitively in order to reduce the PPE requirements.....
If the settings are developed with consideration for upstream and downstream conditions, you should not be introducing additional risk. That's to say that if the engineer/electrician knows what he's doing there should be little to no additonal risk associated with lowering the settings.
The objective is to determine ocpd short-time pickup and instantaneous settings that will allow for normal operation. Some of the things to take into account are: cold-load pickup; motor inrush; coordination intervals between devices; available fault current; etc.
As long as there is attention to those details, and the new adjustments still allow for coordination where required, the lowered INST and STPU settings should give you an overall system improvement.
The real-world problem is that there is rarely ever much adjustment space that still enables coordination; so the preferred solution is the implementation of a maintenance switch as mentioned in the previous post. That lets you take advantage of extreme settings changes for the brief period of maintenance.

John M

We havent had any dramas yet with the upstream tripping so far but was just wondering if the engeneers where just taking a soft option when doing there arc fault containment testing. we tested for arc fault with full fault current at .1 of a second which as far im aware of is an alowable time per regulations however it also speaks of times of up to 1 second. im not to shure of the trip curve that is set up on the upstream breaker but do you think we should of tested for a longer period of time at a slightly lower level fault current as well? I think of the top of my head the fault current was 20KA

I think the fact that you're doing AF testing at all is commendable. All you're required to do is test the breakers individually, and not as a system.
As far as times, using the 0.1 second duration should give enough time for 5-cycle breakers to operate and to prove out device coordination, although it is marginally close.
IEEE 1584 - which is the basis for the AF calculations, sets the upper time limit at 2 seconds - figuring that if the breaker hasn't tripped in 2 seconds, the electricain will fall out of the way by then. Kind of a hokey way to define it - but it exists.

John m

Ive got a video of the test but im not sure that i can show it to you guys but was a good experince to setup and do.

Device trip coordination is seldom perfect so you need to decide were it is acceptable to mis-coordinate. Trip device coordinations aren't arc flash risk driven... by that I mean the trip device settings are based on proper sequence of operation in multi OCPD feeders and acceptable equipment protection. Setting the OCPD trip settings too low, such as short time and inst to get lower IE numbers you run the risk of nuisance tripping. Its a balancing act for sure. Most LVPB's have a maintenance switch option that allows lower inst trip settings while working on live equipment.